Tag
l2-cache
- Oct 21, 2025 Atomic Contention and the L2 as a Serialization Point Why a global atomic executes at the cache slice that owns its address, how a hot counter turns a parallel machine into a queue, and which reductions avoid the queue entirely. gpu computing
- Jul 23, 2023 L2 Slices, Address Hashing, and Partition Camping Why the last-level GPU cache is physically distributed across memory controllers, how addresses are spread over it, and how a stride that resonates with the mapping leaves most of the memory system idle. gpu computing