Tag
latency-hiding
- Sep 1, 2026 Latency Hiding and the Arithmetic of Warp Counts Deriving how many resident warps are needed to cover a memory stall from instruction count and latency, and where the Little's law model overstates what interleaving can deliver. gpu computing
- Mar 5, 2026 Occupancy as a Latency-Hiding Budget How resident warps are rationed by registers, shared memory, and block granularity, and how to compute the number of concurrent requests a given occupancy can sustain. gpu computing
- Oct 21, 2025 List Scheduling and the Critical Path How a basic-block scheduler orders instructions to hide latency, why the critical path bounds the result, and how register pressure forces it to give that bound up. compilers
- Jul 30, 2025 What Occupancy Actually Counts Why occupancy is a ratio of resident warps to a hardware maximum rather than a utilization measure, and how registers, shared memory, and block limits each cap it. gpu computing
- Nov 20, 2023 Memory-Level Parallelism and Latency Tolerance How many independent memory requests a kernel keeps in flight determines whether it can saturate bandwidth, and how unrolling and load reordering raise that count without adding warps. gpu computing