Tag
memory-bandwidth
- Sep 29, 2026 Weight-Only Quantization and the Memory-Bandwidth Bound Why 4-bit weights speed up token generation while leaving prefill almost untouched, how the dequantize-on-load kernel works, and where the arithmetic intensity ceiling sits. inference systems
- Aug 26, 2026 im2col Expansion, FFT Convolution, and Winograd Transforms Three ways to turn a convolution into matrix arithmetic: what im2col replicates in memory, when the Fourier route wins, and what Winograd trades away in numeric range. deep learning
- May 8, 2026 Bandwidth-Bound and Latency-Bound Work How to tell which of the two memory limits a kernel is actually hitting, why the remedy differs completely, and how the arithmetic intensity decides. performance engineering
- Mar 20, 2026 Operator Fusion and the Conditions That Block It Why merging adjacent operators into one kernel removes memory traffic, how producers and consumers are classified, and which graph shapes make the merge illegal or unprofitable. inference systems
- Sep 3, 2025 Strided, Indexed, and Gather Memory Access Why contiguous vector loads map onto ordinary cache lines while strided and indexed accesses turn into many element transactions, and where the memory system stops being able to keep a vector unit fed. computer architecture
- Aug 28, 2025 What CPU Quotas Cannot Bound: Cache, Bandwidth, and SMT Contention Between Tenants Fair-share scheduling accounts for time, not for shared microarchitectural state; the resources that leak between co-tenants and the placement choices that limit the leak. cloud infrastructure
- Aug 27, 2025 NUMA First-Touch and the Memory Bandwidth Ceiling per Node Why a multi-socket node delivers less than its nominal bandwidth to an unaware program, and how page placement, binding, and the roofline interact. scientific computing
- Aug 5, 2025 Swizzled Texel Layouts and the Cost of a Bilinear Fetch Why row-major storage makes a four-texel fetch hit two cache lines or more, how tiled and Morton-ordered layouts repair it, and where the repair stops paying. computer graphics
- May 7, 2025 Stride Prefetchers and the Timing Problem of Prefetch Distance How a stream prefetcher detects a recurring address delta, why prefetching too early evicts useful lines, and how accuracy, coverage, and timeliness trade against each other. memory systems
- Mar 29, 2025 Disk-Resident Graph Indexes and the Memory Bandwidth Wall What changes when the vector index no longer fits in RAM: page-oriented adjacency storage, the cost of a random read per hop, and why compression and caching decide throughput. information retrieval
- May 6, 2023 Activation Memory, Gradient Recomputation, and the Checkpoint Trade How the memory cost of a convolutional training step is computed, why activations outgrow weights, and what gradient checkpointing buys at what arithmetic price. deep learning
- May 14, 2022 Compressed BVH Nodes and Quantized Bounds How bounds shrink to byte and short quanta, what the inverse mapping costs per test, and why the compressed tree changes traversal arithmetic and memory traffic. computer graphics