Tag
memory-fences
- Jul 17, 2026 Compiler Reordering and the Contract It Must Not Break Why an optimiser may sink an atomic load past a store only in certain cases, where the as-if rule stops, and how data races turn a performance model into undefined behaviour. computer architecture
- Sep 15, 2025 What a Fence Instruction Actually Does to the Pipeline The three mechanisms behind fence cost — buffer drain, request acknowledgement, and memory-operation serialisation — and why a fence is never a cache flush. computer architecture
- Aug 28, 2023 Ordering Across the Device Boundary: DMA, MMIO, and Posted Writes Why a device can read stale data after a synchronising store, how posted writes hide completion, and which barriers cross the boundary in each direction. computer architecture