Tag
memory-level-parallelism
- Apr 9, 2026 Miss Status Holding Registers and Memory-Level Parallelism How a cache tracks outstanding misses by line rather than by request, why secondary misses merge, and how the number of MSHRs caps the parallelism a core can expose. memory systems
- Nov 20, 2023 Memory-Level Parallelism and Latency Tolerance How many independent memory requests a kernel keeps in flight determines whether it can saturate bandwidth, and how unrolling and load reordering raise that count without adding warps. gpu computing
- Dec 21, 2022 Dependent Loads and the Cost of Pointer Chasing Why linked structures serialise the memory system, how a dependent load chain differs from independent accesses, and what prefetchers cannot see. performance engineering