Tag
posted-writes
- Sep 16, 2026 Posted Writes and the Ordering Rules a Device Must Respect Why PCIe memory writes are fire-and-forget, which transactions may pass which, and how a device orders its data ahead of its interrupt so the handler sees a completed transfer. hardware engineering
- Jun 12, 2026 Memory-Mapped Registers and the Ordering Rules Behind a Store How a device BAR becomes an address the core can load and store, why a posted write is not a completed write, and what a read-back actually guarantees. computer architecture