Tag
register-allocation
- Sep 9, 2026 Scheduling Before Allocation and the Pressure Trade Why an aggressive instruction schedule can force spills that erase its own benefit, how pressure-aware scheduling caps live values, and what iterative repair actually converges on. compilers
- Jun 8, 2026 Chordal Interference Graphs and Optimal Coloring in SSA Form Why the interference graph of an SSA program has no induced cycles longer than three, how a perfect elimination ordering yields a minimum coloring in linear time, and what destroying SSA costs. compilers
- Mar 21, 2026 Building the Interference Graph from SSA Live Ranges Why SSA live ranges interfere only at phi-connected join points, how that makes the graph chordal, and what the colouring and spilling decisions cost once the graph is built. compilers
- Feb 22, 2026 Two-Operand Encodings and the Destructive Write Problem Why the second source register disappears in a two-operand format, how destructive writes constrain register allocation, and what a three-operand format buys back. computer architecture
- Sep 3, 2025 Spill Cost Heuristics and the Choice of Victim How allocators price a virtual register in loads and stores, why the cost-to-degree ratio is the wrong objective in loops, and what the reload placement problem looks like after spilling. compilers
- Aug 26, 2025 Building the Interference Graph from Live Sets The exact rules that turn per-instruction liveness into graph edges, why move instructions are treated differently, and how the graph representation affects the cost of coloring. compilers
- Jul 29, 2025 Partitioned Boolean Quadratic Programming for Register Allocation How encoding allocation as per-node costs plus per-edge cost matrices lets a solver trade spills against copies with a single objective, and why reduction rules beat coloring heuristics on hard graphs. compilers
- Jun 29, 2025 Linear Scan Allocation over Sorted Live Intervals How a single pass over intervals ordered by start point assigns registers, why active-list eviction beats spilling the current interval, and what the interval approximation gives up. compilers
- Mar 20, 2025 Register Allocation and the Occupancy Ceiling How per-thread register counts are rounded into per-warp reservations, why a few extra registers can cost half the resident warps, and what forcing a lower count actually costs. gpu computing
- May 21, 2024 Inline Assembly Constraints and What a Clobber List Does Not Say A compiler knows nothing about the instructions inside an assembly block, so every register, flag, and memory effect has to be declared, and an undeclared effect is silently miscompiled. systems programming
- Oct 23, 2023 Live-Range Splitting at Region Boundaries Why a value that is live in two distant regions is better allocated as two values, how splitting interacts with spilling, and what the extra moves cost at the join. compilers
- Sep 12, 2023 Calling Conventions as Precolored Constraints on the Graph How the ABI fixes which registers hold arguments, returns, and preserved values, and how those obligations enter the interference graph as edges to nodes that already have a color. compilers
- Aug 3, 2022 Conservative Coalescing and the Conditions That Make It Safe Why merging the source and destination of a move can make a colorable graph uncolorable, and how the Briggs and George tests decide when the merge is guaranteed not to hurt. compilers
- Jul 25, 2022 The Simplify and Select Loop of Chaitin-Style Coloring Why coloring a register interference graph is done by repeatedly removing low-degree nodes and pushing them back on a stack, what the degree test really guarantees, and when the greedy result is optimal. compilers
- Dec 8, 2021 Live Ranges as the Input to Register Allocation How backward liveness analysis turns a control-flow graph into the per-value program points that every allocator reasons over, and where that abstraction stops being exact. compilers