Tag
simd
- Oct 11, 2026 Bit Packing and Frame-of-Reference Blocks How choosing a bit width per block of postings beats byte-aligned codes, what the block maximum costs in wasted bits, and why patched exceptions sometimes beat both. information retrieval
- Jun 8, 2026 Adaptive Radix Tree Node Layouts ART keeps fan-out high without paying a 256-way node per prefix: four node widths, a 256-entry indirection table, path compression inside the header, and lazy expansion of leaves. data structures
- Oct 26, 2025 Fixed-Width SIMD Lanes Versus Scalable Vector Registers Why one design bakes the vector length into the instruction encoding and the other reports it at run time, and how each choice propagates into code generation, binary compatibility, and register pressure. computer architecture
- Sep 18, 2025 Array of Structs or Struct of Arrays How element stride decides which fields a scan pulls into cache, when splitting a record into parallel columns pays, and what the split costs elsewhere. data structures
- Jul 7, 2025 Parallel Tree Hashing and the BLAKE3 Design How chunk trees, parent nodes, and a stack of subtree roots convert a sequential hash into a parallel one, and what the tree structure costs in digest size and complexity. cryptography
- Jun 29, 2025 SwissTable Control Bytes and Group-Wise Probing How a one-byte tag per slot lets a lookup reject fifteen candidates with one SIMD comparison, and why metadata separate from keys changes the memory hierarchy. data structures
- Apr 24, 2025 Bit-Packed Integer Arrays and Vectorized Decoding How fixed-width packing puts k-bit integers into words, why decoding costs more than encoding, and how SIMD shuffles make unpacking cheap. data structures
- Apr 6, 2025 Quad Shading, Helper Invocations, and Where Derivatives Come From Why fragment shaders execute in 2x2 quads, what a derivative instruction computes when neighbouring pixels are not covered, and how helper invocations keep implicit gradients defined. gpu computing
- Mar 25, 2025 Bitmap and Roaring Indexes for Combining Predicates How one bit per document per value makes conjunctions word-parallel, why the space cost forces chunked container formats, and where the crossover thresholds sit. algorithms
- Jan 15, 2025 Vectorized Execution: Batches, Selection Vectors, and Push vs Pull Why processing tuples in column batches amortizes interpretation overhead, how selection vectors represent filtered rows, and what a push-based pipeline changes. databases
- Mar 24, 2024 SIMD Encoding: Vector Register Fields, Predication and Length How vector instructions spend their encoding bits on register numbers, masks and element widths, and why vector length is sometimes in the instruction and sometimes in a control register. computer architecture