Tag
store-buffers
- Aug 26, 2026 Write-Back, Write-Through, and the Cost of a Dirty Line How a cache decides whether a store waits for memory, what write-allocate does to a partial line, and why the dirty bit turns an eviction into a second transaction. memory systems
- Apr 28, 2026 Store Buffers and the Total Store Order That Replaces Sequential Consistency How a per-core store buffer hides cache-miss latency, exactly which four orderings TSO keeps, and why load-load reordering is forbidden while load-store is not. computer architecture
- Oct 21, 2025 Acquire and Release Ordering: What a Lock Actually Guarantees About Memory How store buffers and compiler reordering let a consumer observe a published value before the data it points to, and how release and acquire operations restore the ordering without a full fence. operating systems
- Jun 28, 2024 Store Buffers and the x86-TSO Model How a per-core write buffer leaves store-load as the only program-order pair that may invert, why forbidding it would defeat the buffer, and what a locked instruction orders. memory systems