Tag
tlb
- Feb 1, 2026 Nested Paging: Two-Dimensional Translation for Virtual Machines How a guest physical address becomes a host physical address, why the walk cost multiplies, and which workloads suffer most from the second level of tables. memory systems
- Nov 30, 2025 Large Pages: What 2 MiB Granularity Buys and What It Breaks How huge pages collapse page-table levels and extend translation reach, why physical contiguity is the binding constraint, and where the memory waste becomes unacceptable. memory systems
- May 6, 2025 Second-Level Address Translation: Composing Two Page Walks in Hardware How EPT and nested paging remove the shadow-table trap per guest page-table write, what the extra walk costs in memory references, and why accessed and dirty bits become a virtualization problem. virtualization
- May 6, 2025 The TLB, Associativity, and What a Miss Actually Costs How the translation cache is organised, why it is small and fully associative, what the hardware does on a miss, and which access patterns destroy its hit rate. memory systems
- Mar 3, 2025 The Anatomy of a Context Switch Which registers are saved, where they go, why the switch costs more than the save, and how address-space tags avoid flushing the translation cache. operating systems
- Jan 3, 2025 Nested Paging: The Two-Dimensional Walk and the Cost of a Single Guest Access How EPT and NPT turn every guest memory access into two page walks, what an EPT violation reports, and why the hardware page-walk cache decides whether nested paging is cheap or ruinous. virtualization
- May 25, 2024 Kernel Page Table Isolation and What It Costs on Every Trap Why splitting the kernel into a separate address space defends against speculative reads, how the switch is arranged to be nearly free, and where the remaining cost lands. memory systems
- Dec 15, 2023 Shadow Page Tables: Keeping Two Guest Mappings Consistent With One Hardware Walk Why a hypervisor must build its own page tables from the guest's, which guest writes force a rebuild, and how the reverse-map and write-protection machinery bounds the cost of keeping them honest. virtualization
- Dec 8, 2022 TLB Tagging and Nested Invalidation: Keeping Translations Alive Across a VM Boundary Why guest translations must survive an exit, how address-space identifiers make that possible, and why invalidating the second level is coarser and more expensive than the first. virtualization