Operating Systems · Cluster
Interrupts and Timers
Deferred work, softirqs, and clock sources.
- 01 How a Hardware Interrupt Reaches a Handler on x86-64 The gate descriptor lookup, the privilege transition, and the stack switch that carry a device signal into kernel code, and what each step costs.
- 02 From Hardware Line to Virtual IRQ Number How the kernel maps a controller-specific interrupt source onto a stable software number, what the irq_desc and irq_chip split buys, and why shared lines need an action list.
- 03 Interrupt Controllers from the 8259A to Message-Signalled Interrupts Why interrupts moved from shared wires and acknowledge cycles to memory writes, and what the older controllers still constrain in a modern machine.
- 04 Top Halves and Bottom Halves Why an interrupt handler cannot sleep, how the split between immediate and deferred work is drawn, and what each deferral mechanism costs in latency and context.
- 05 Softirqs and the Per-CPU Deferred Queue How the fixed softirq vector set, the per-CPU pending mask, and the budgeted processing loop cooperate, and why running twice on one CPU is a bug rather than a race.
- 06 Clock Sources, Clock Events, and the Tick The two abstractions behind kernel time: hardware that can be read for a timestamp, hardware that can raise an interrupt at a chosen moment, and the periodic tick built from the second.
- 07 Timer Wheels and the Cost of Finding the Next Expiry Why a sorted list or a heap is the wrong structure for thousands of concurrent timers, how a hashed wheel amortises the work, and what the resolution trade costs.
- 08 NAPI and Interrupt Mitigation How a network driver switches from one interrupt per packet to a budgeted poll, what the weight and time limits protect, and where the scheme loses packets.
- 09 Measuring and Bounding Interrupt Latency What latency means at each point between a device asserting and a thread running, which mechanisms inflate the tail, and why the distribution rather than the average is the design target.
- 10 Interrupt Delivery Inside a Virtual Machine Why injecting an interrupt into a guest can cost a world switch, how posted interrupts and APIC virtualization remove that cost, and what remains expensive.