Tag
memory-hierarchy
- Jun 25, 2026 Mercury Delay-Line Memory and the Timing It Imposed How acoustic pulses recirculating in mercury hold a bit stream, why access time depends on the address, and what that forced on instruction placement and memory layout. computing history
- Nov 4, 2025 Walking a Multi-Level Page Table How four levels of tables turn a 36-bit page number into a frame, what each level costs in memory and cache misses, and why the walk is not free even when it succeeds. memory systems
- May 6, 2025 The TLB, Associativity, and What a Miss Actually Costs How the translation cache is organised, why it is small and fully associative, what the hardware does on a miss, and which access patterns destroy its hit rate. memory systems
- Apr 14, 2025 The Address Spaces a GPU Kernel Can Touch How global, local, shared, and constant memory differ in scope, lifetime, and backing store, and why the compiler must know which space a pointer refers to. gpu computing
- Mar 25, 2025 PRAM Variants and the Cost of Ignoring Memory What the EREW, CREW, and CRCW models permit, how work and depth carry over from the DAG, and why a model with free memory access mispredicts real parallel time. algorithms
- Sep 9, 2024 The Memory Gap and the Arithmetic of Average Access Time How the latency of each level combines into one average, why a small miss rate can dominate the total time, and where the model stops describing real hardware. memory systems
- Nov 4, 2021 IO-Aware Attention: Tiling the Score Matrix Without Materializing It Why the intermediate attention tensors cost more than the arithmetic, how blockwise softmax stays exact, and what the online rescaling step has to preserve. deep learning