Mercury Delay-Line Memory and the Timing It Imposed

A mercury delay-line store has no address decoder and no selection matrix. It is a set of mercury-filled tubes, each with a piezo-electric transducer at either end. The input transducer turns the machine’s electrical signal into acoustic pulses that cross the mercury; the far transducer receives them, amplifies them, and passes them back to the input. A bit is never held anywhere in the tube. It is in transit, passing under the read head once per circulation. The line’s physical length fixes how many bits fit in one circulation, and that count is the capacity.

The design constraint follows directly. A stored word has no fixed location that can be probed at an arbitrary moment; it has a phase. Reading it means waiting until its slot in the travelling train reaches the head, and the wait depends on how far the train has advanced. Memory access is a scheduling problem, not a lookup. J. Presper Eckert, who had worked with mercury-filled tubes for reducing clutter in wartime radar, adapted the idea to data storage and filed a patent on 31 October 1947; it issued as U.S. Patent 2,629,827 on 24 February 1953.

A word that must come round again

Pulses arriving at the output end are detected, reshaped, and reinserted at the input end, so the pattern persists as long as the machine keeps clocking it. A word is visible for one word-time per revolution. A request that arrives just after the word has passed waits nearly a full revolution; one that arrives just before it waits almost nothing. The same address has a best case of zero and a worst case of one circulation period, decided by the state of the machine at the instant of the request.

A word that is not read is still rewritten: the output transducer’s signal is reshaped and fed back, so the pattern survives without any refresh instruction. Changing a word means substituting new pulses at the write point as that word’s slot passes, while the rest of the stream continues unchanged. Every access, read or write, is tied to the word’s position in the train.

EDSAC, at Cambridge, held 32 numbers of 17 binary digits, one of them a sign digit, in each of 32 tanks about five feet long, giving 1,024 storage locations. The Computer History Museum records the same store as 576 bits per line. Thirty-two words into 576 bits is 18 bit-times per word, so one slot in each 18 carries no data. Every word sits at a fixed offset from a known point in the circulation; the spare slot is what makes 32 words of 17 bits add up to 576 bits.

18,432 bits, counted three ways

The descriptions agree. Thirty-two tanks of 576 bits is 18,432 bits. Cambridge counts that as 1,024 locations of 17 bits plus a gap slot each; the Museum counts it as 512 words of 35 bits. The difference is word width, not hardware: a 35-bit number occupied two adjacent locations, 36 bit-times, exactly twice the 18 of a short word, and 18,432 divided by 36 is 512. Short tanks holding one number served as the accumulator, the multiplier register, and for control; even the accumulator was a delay line one word long, so its contents came round once per word-time.

Allocation was constrained by this arithmetic. A 35-bit constant needed a pair of adjacent locations positioned so that both halves arrived in order, and a word could not be split across tanks, since each tank circulated independently with no fixed relationship to any other’s stream.

The EDVAC design report took the same geometry and made the address say so. Its target was 8,192 words of 32 bits, of which 2,048 were still considered useful; the store was 256 delay-line organs of 1,024 bits each, 32 words per organ. Eight address bits selected the organ and five the word within it, 13 bits in total. A 32-bit word fills a 1,024-bit organ exactly, with no gap slot, so EDVAC’s organ arithmetic is tidier than EDSAC’s.

def decode(address):
    organ = (address >> 5) & 0xFF   # eight bits choose the delay-line organ
    word = address & 0x1F           # five bits choose the word inside it
    return organ, word

print(decode(0b000000011111))       # organ 0, word 31

The split is not hidden behind the address; it is the address. The high bits name a tube and the low bits name a position in that tube’s stream, so the layout could not change without breaking every program that depended on it.

The 841 per second bound

Cambridge gives the ceiling directly: because a stored instruction had to circulate before the next one could be executed, the fastest consecutive instruction rate was 500,000 divided by ((32+1) x (17+1)), or 841 instructions per second. The formula runs 33 word-times of 18 bit-times, 594 bit-times; at 500 kHz one circulation lasts 1.188 ms, whose reciprocal is 841.75. The extra word-time beyond the 32 the tank holds is the gap between the 576 stored bits and the 594 slots the formula counts.

That figure is a bound, not a measurement. It assumes the next instruction is in the same tank and that no operand fetch costs anything, so it is the rate back-to-back orders in one line would reach if every order landed in its needed slot. Cambridge records an average order time of 1.5 ms, about 650 instructions per second, roughly three-quarters of the ceiling. Multiplication took 4.5 ms, about 222 per second, and division roughly 200 ms in software, about five per second, so one division cost as much time as 133 average orders.

The contrast with a machine of directly addressed registers is direct. ENIAC’s accumulator registers were selected by the program and held their digits without any stream to wait for, so an operand was available when the program line named it and arithmetic timing did not depend on where the data sat.

Placement as a programming discipline

If the tank is treated as a fixed rotating array of bit-slots, the cost becomes explicit. The model keeps the 576 stored slots and ignores the extra word-time the bound above counts; it models the addressing arithmetic, not an EDSAC tank.

SLOTS = 576          # bit-slots circulating in one EDSAC line
WORD_SLOTS = 18      # 17 data bits plus the gap slot

def wait_slots(address, head):
    """Bit-times until word `address` next passes under the read head."""
    return (address * WORD_SLOTS - head) % SLOTS

# mean over every word and every possible head position
total = sum(wait_slots(a, h) for a in range(32) for h in range(SLOTS))
mean = total / (32 * SLOTS)
print(mean)                 # 287.5, i.e. (SLOTS - 1) / 2
print(mean / 500_000)       # 0.000575 s at a 500 kHz clock

The mean wait is half a circulation, 287.5 bit-times or 575 microseconds; the worst case is 575 bit-times, just short of the 1.152 ms a full 576-slot revolution takes. Which end a given instruction sees depends on the distance, in slots, between the order and the word it names. Moving an instruction by one word position changes its wait by 18 bit-times, or 36 microseconds.

The earliest programming literature documents the practice. The Preparation of Programs for an Electronic Digital Computer, by Wilkes, Wheeler and Gill in 1951, and Campbell-Kelly’s later account of EDSAC programming, treat the placement of orders and constants as part of writing a program. The initial orders, 31 instructions hard-wired on uniselectors, assembled symbolic programs from paper tape; the second release, occupying 41 words, added relocation so subroutines could be used. Relocation in a serial store is heavier than changing an address, because moving a routine changes which word-time each instruction occupies, and with it the wait for every operand that routine uses. EDSAC was not the first machine to run a stored program, since the Manchester machine did so in 1948, but the Computer History Museum calls it the first full-size stored-program computer, and its layout made placement part of the instruction stream.

Constants show the trade most clearly. A constant used by orders in several tanks can be positioned to suit only one of them; the alternative is several copies, spending locations to buy back time. With 1,024 locations, both sides were expensive.

UNIVAC I: ten-word channels and a heated tank

UNIVAC I, the first of which was accepted by the US Census Bureau on 31 March 1951, chose the opposite point on serial depth. Its main memory held 1,000 words of 12 characters, built from about 100 channels of 10-word mercury delay-line registers, grouped in seven tanks of 18 channels each, with the surplus channels carrying input and output buffers and a channel for the Y register. The 1,000 words were therefore not the whole of the mercury on the machine. Ten words per channel is under a third of EDSAC’s 32, so the worst-case wait spans a third as many word-times, paid for with more transducers and amplifiers per character.

The recorded average memory access time is 222 microseconds, 42 percent of the 525-microsecond addition time. Addition and multiplication were 525 and 2,150 microseconds, so a multiply cost about four additions. The recirculation delay was no longer an exotic property of the store; it was a routine fraction of every operation’s cost.

The tank also imposed a maintenance cost no electronic store had. The speed of sound in mercury varies with temperature, so the delay through a tube varies with it, and the mercury was closely temperature-controlled. After a power failure, hours could elapse before the temperature stabilised. Contents defined by timing cannot be restored by restoring power alone.

Wire, calculators, and the end of the scheduling problem

Magnetostrictive delay lines replaced mercury in some machines. An electromagnet twists a solid wire one way or the other to represent a one or a zero, and the twist propagates as an ultrasonic wave. The storage is more convenient and more reliable than a column of mercury, and its capacity is lower. The Ferranti Sirius of 1964 held 1,000 words in delay lines, and the mechanism appeared in early desktop calculators, including the Friden EC130 of 1964, the Olivetti Programma 101 of 1965, and the Litton Monroe Epic 2000 of 1967, where a short circulation suited a slow keyboard.

A delay line spends one transducer pair and one amplifier on an entire circulation of bits, which made it economical at low capacity and awkward at high capacity. Random-access storage removed the phase from the address: a word could be read at any moment, its position stopped mattering, and the placement discipline EDSAC programming depended on became pointless. By the 1970s semiconductor memory had replaced delay lines even in calculators.