Hardware Engineering · Cluster
Storage Hardware
NAND, HDD mechanics, and controllers.
- 01 How a NAND Cell Stores a Bit: Threshold Voltage and Read Levels The floating-gate transistor, the programmed charge that shifts its threshold, and why adding levels to a cell shrinks the margin every read decision depends on.
- 02 Writing and Reading a Magnetic Bit on a Spinning Platter How a write head sets the direction of magnetisation in a granular medium, why transitions rather than levels carry the data, and what the read sensor and channel must recover.
- 03 Page Program and Block Erase: The Asymmetry That Shapes Flash Software Why a flash array writes in pages of a few kilobytes but can only be cleared in blocks of hundreds, what that costs in area and time, and how the asymmetry propagates upward.
- 04 Seek Time, Rotational Latency, and Why the Average Is Not the Middle How a drive decomposes an access into seek, settle, and rotation, why the mean seek is not half the maximum, and how queueing turns latency into a throughput number.
- 05 Error Correction in NAND: From Hard Bits to Soft Read Retry How BCH and LDPC codes absorb the raw bit error rate of a flash page, why soft-decision decoding needs several reads at shifted reference voltages, and what happens when correction runs out.
- 06 Flash Translation Layers: Mapping Tables, Garbage Collection, and Write Cost How a controller maps logical blocks onto pages that can never be overwritten, why the mapping table does not fit in SRAM, and how the choice of victim block sets write amplification.
- 07 Shingled Magnetic Recording and the Write Cursor Why overlapping written tracks raise areal density, how that turns every random write into a band rewrite, and what a zoned interface has to expose to make the constraint usable.
- 08 Channels, Dies, and Planes: How a Flash Controller Reaches Its Throughput A single flash die serves one operation at a time, so drive throughput comes from concurrency across channels and planes; the arithmetic of that concurrency sets the queue depth a workload needs.
- 09 Power-Loss Protection: What a Controller Must Persist, and When The in-flight state a flash controller holds in volatile memory, the energy budget that keeps it alive long enough to flush, and how recovery reconstructs a mapping table from torn pages.
- 10 Protection Information: Eight Bytes That Catch Misdirected Writes How T10 protection information appends a CRC, a reference tag, and an application tag to every logical block, and what it costs to check them at the drive and at the host.