Computer Architecture · Cluster

Out-of-Order Execution

Renaming, scheduling, and retirement.

  1. 01 Why an In-Order Pipeline Stalls and What an Instruction Window Buys How dependencies, latency, and a fixed instruction supply bound an in-order pipeline, and why a sliding window of decoded instructions is the cheapest way out. foundational · Jun 3, 2022
  2. 02 Register Renaming and the Elimination of False Dependencies Why architectural register names serialize otherwise independent code, how a rename table maps names to physical registers, and what the mapping costs in area and latency. foundational · Oct 6, 2023
  3. 03 The Reorder Buffer and In-Order Retirement How entries move through the reorder buffer from allocation to commit, why retirement order is what makes speculative and out-of-order execution safe, and what limits the buffer size. foundational · May 13, 2026
  4. 04 Issue Queue Wakeup and Select: The Scheduler Inside the Window How a queue of waiting instructions learns that its operands are ready, how one instruction per port is chosen each cycle, and why the broadcast network is the hard part. intermediate · Oct 12, 2026
  5. 05 Load-Store Ordering and Memory Disambiguation in a Speculative Machine Why loads may run ahead of stores, how the memory order buffer checks addresses it does not know yet, and what happens when a load guesses wrong. intermediate · May 4, 2026
  6. 06 Checkpointing and Recovery from Misprediction How a speculative machine restores an exact rename mapping after a wrong branch, why per-branch checkpoints beat a walk-back repair, and what recovery latency costs. intermediate · Jun 9, 2025
  7. 07 Precise Exceptions from an Imprecise Machine Why an out-of-order core must present exceptions at exact instruction boundaries, the ordering rules for synchronous faults versus interrupts, and what the operating system can rely on. intermediate · Mar 19, 2026
  8. 08 Front-End Throughput and the Fetch Bandwidth Ceiling Why a wide out-of-order back end can still run narrow, how instruction cache line boundaries, prediction, and decode width bound the supply, and what designs do about it. advanced · Feb 28, 2026
  9. 09 Sizing the Window: Why More Entries Stop Paying The diminishing returns of a larger instruction window, the queueing model that explains them, and the second-order effects that make big windows expensive. advanced · Dec 13, 2022
  10. 10 Value Prediction and the Limits of Speculating on Data What it would take to break true data dependencies, why value prediction attacks a different limit than branch prediction, and the correctness and cost barriers that keep it out of shipping cores. advanced · Nov 3, 2024