Embedded Systems · Cluster
Microcontrollers
Cores, peripherals, and memory maps.
- 01 How a Microcontroller Memory Map Assigns Meaning to Every Address How fixed address regions are decoded on a microcontroller, why peripherals sit at constant addresses, and what the bus does with an address that nothing claims.
- 02 Flash Wait States and the Cost of Fetching Instructions from Embedded Flash Why an on-chip flash array cannot feed a fast core at one word per cycle, how wait states and prefetch buffers change that, and where the timing stops being uniform.
- 03 Nested Interrupt Entry, Tail-Chaining and Late Arrival in the NVIC How the interrupt controller decides which of several pending interrupts runs first, why back-to-back handlers skip the full restore, and what happens when a request arrives during entry.
- 04 Clock Gating, Peripheral Enable Order and the Write That Disappears Why a peripheral register write does nothing until its bus clock is enabled, why enabling order matters for parts with dependency chains, and how to diagnose the silent failure.
- 05 Bus Matrix Arbitration and What DMA Contention Costs the Core How a multi-master bus fabric picks a winner when the core and a DMA engine target the same SRAM, why round-robin is not always fair, and how contention shows up as jitter.
- 06 GPIO Configuration Registers and the Reset States That Drive Pins How a general-purpose pin is routed, why the reset state of every pin matters at power-on, and which configuration mistakes produce a pin that looks correct and is not.
- 07 Successive-Approximation ADCs: Sample-and-Hold Settling and Conversion Timing What limits the sample rate of a SAR converter, why the sampling switch needs a settling budget, and how source impedance turns a datasheet accuracy figure into a smaller one.
- 08 Timer Prescalers, Auto-Reload and the Arithmetic Behind a Period How the prescaler and auto-reload registers divide a clock into a period, why the achievable periods are quantised, and how update events and preload buffering change when a new period takes effect.
- 09 Bit-Banding: Atomic Single-Bit Access Through an Alias Address Region How the Cortex-M3 and M4 alias one bit of memory to a whole word, what address arithmetic maps bit to word, and why the feature disappeared from later cores.
- 10 Memory Protection Units on Microcontrollers and Stack Overflow Detection How an MPU partitions a small address space into regions with access attributes, why guard regions catch a stack overflow at the fault rather than later, and what the unit cannot protect.